{"id":13973,"date":"2015-05-12T07:22:00","date_gmt":"2015-05-12T06:22:00","guid":{"rendered":"https:\/\/rafen.app\/uncategorized\/multiprocessor-architecture\/"},"modified":"2015-05-12T07:22:00","modified_gmt":"2015-05-12T06:22:00","slug":"multiprocessor-architecture","status":"publish","type":"post","link":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/","title":{"rendered":"MULTIPROCESSOR ARCHITECTURE"},"content":{"rendered":"<p>Modern paradigms of designing parallel systems. Processors with multiple cores and multiprocessors. Interconnection networks. Options for scaling and composition. Speculative Multithreaded architecture. The choice of metrics for measuring performance. Rating architectural ideas and possible compromises. Simulation of multiprocessors. The problem of downscaling machine parameters for the simulation. Studying the space of parameters. Multiprocessors with shared memory. Consistency of memory and the problem of cache coherence. The hardware transactional memory. General purpose multiprocessor systems. High-performance systems. High availability systems. Stream Processors. Heterogeneous multiprocessors.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Modern paradigms of designing parallel systems. Processors with multiple cores and multiprocessors. Interconnection networks. Options for scaling and composition. Speculative Multithreaded architecture. The choice of metrics for measuring performance. Rating architectural ideas and possible compromises. &#8230; <a title=\"MULTIPROCESSOR ARCHITECTURE\" class=\"read-more\" href=\"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/\" aria-label=\"More on MULTIPROCESSOR ARCHITECTURE\">Read more<\/a><\/p>\n <a href=\"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/\" class=\"more-link\" title=\"Read more\">Read more<\/a>","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[199],"tags":[],"class_list":["post-13973","post","type-post","status-publish","format-standard","hentry","category-subjects"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.7 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>MULTIPROCESSOR ARCHITECTURE - School of Computing<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"MULTIPROCESSOR ARCHITECTURE - School of Computing\" \/>\n<meta property=\"og:description\" content=\"Modern paradigms of designing parallel systems. Processors with multiple cores and multiprocessors. Interconnection networks. Options for scaling and composition. Speculative Multithreaded architecture. The choice of metrics for measuring performance. Rating architectural ideas and possible compromises. ... Read more\" \/>\n<meta property=\"og:url\" content=\"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/\" \/>\n<meta property=\"og:site_name\" content=\"School of Computing\" \/>\n<meta property=\"article:published_time\" content=\"2015-05-12T06:22:00+00:00\" \/>\n<meta name=\"author\" content=\"RAF Admin\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"RAF Admin\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/subjects\\\/multiprocessor-architecture\\\/#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/subjects\\\/multiprocessor-architecture\\\/\"},\"author\":{\"name\":\"RAF Admin\",\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/#\\\/schema\\\/person\\\/4e2166c781f2802c67414a1578c66a43\"},\"headline\":\"MULTIPROCESSOR ARCHITECTURE\",\"datePublished\":\"2015-05-12T06:22:00+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/subjects\\\/multiprocessor-architecture\\\/\"},\"wordCount\":84,\"publisher\":{\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/#organization\"},\"articleSection\":[\"Subjects\"],\"inLanguage\":\"en-US\"},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/subjects\\\/multiprocessor-architecture\\\/\",\"url\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/subjects\\\/multiprocessor-architecture\\\/\",\"name\":\"MULTIPROCESSOR ARCHITECTURE - School of Computing\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/#website\"},\"datePublished\":\"2015-05-12T06:22:00+00:00\",\"breadcrumb\":{\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/subjects\\\/multiprocessor-architecture\\\/#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/raf.edu.rs\\\/en\\\/subjects\\\/multiprocessor-architecture\\\/\"]}]},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/subjects\\\/multiprocessor-architecture\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Homepage\",\"item\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Subjects\",\"item\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/subjects\\\/\"},{\"@type\":\"ListItem\",\"position\":3,\"name\":\"MULTIPROCESSOR ARCHITECTURE\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/#website\",\"url\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/\",\"name\":\"School of Computing\",\"description\":\"\",\"publisher\":{\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"},{\"@type\":\"Organization\",\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/#organization\",\"name\":\"School of Computing\",\"url\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/#\\\/schema\\\/logo\\\/image\\\/\",\"url\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/wp-content\\\/uploads\\\/2023\\\/02\\\/cropped-raf-engleski.png\",\"contentUrl\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/wp-content\\\/uploads\\\/2023\\\/02\\\/cropped-raf-engleski.png\",\"width\":400,\"height\":66,\"caption\":\"School of Computing\"},\"image\":{\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/#\\\/schema\\\/logo\\\/image\\\/\"}},{\"@type\":\"Person\",\"@id\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/#\\\/schema\\\/person\\\/4e2166c781f2802c67414a1578c66a43\",\"name\":\"RAF Admin\",\"sameAs\":[\"https:\\\/\\\/raf.app\"],\"url\":\"https:\\\/\\\/raf.edu.rs\\\/en\\\/author\\\/rafadmin\\\/\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"MULTIPROCESSOR ARCHITECTURE - School of Computing","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/","og_locale":"en_US","og_type":"article","og_title":"MULTIPROCESSOR ARCHITECTURE - School of Computing","og_description":"Modern paradigms of designing parallel systems. Processors with multiple cores and multiprocessors. Interconnection networks. Options for scaling and composition. Speculative Multithreaded architecture. The choice of metrics for measuring performance. Rating architectural ideas and possible compromises. ... Read more","og_url":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/","og_site_name":"School of Computing","article_published_time":"2015-05-12T06:22:00+00:00","author":"RAF Admin","twitter_card":"summary_large_image","twitter_misc":{"Written by":"RAF Admin"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/#article","isPartOf":{"@id":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/"},"author":{"name":"RAF Admin","@id":"https:\/\/raf.edu.rs\/en\/#\/schema\/person\/4e2166c781f2802c67414a1578c66a43"},"headline":"MULTIPROCESSOR ARCHITECTURE","datePublished":"2015-05-12T06:22:00+00:00","mainEntityOfPage":{"@id":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/"},"wordCount":84,"publisher":{"@id":"https:\/\/raf.edu.rs\/en\/#organization"},"articleSection":["Subjects"],"inLanguage":"en-US"},{"@type":"WebPage","@id":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/","url":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/","name":"MULTIPROCESSOR ARCHITECTURE - School of Computing","isPartOf":{"@id":"https:\/\/raf.edu.rs\/en\/#website"},"datePublished":"2015-05-12T06:22:00+00:00","breadcrumb":{"@id":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/"]}]},{"@type":"BreadcrumbList","@id":"https:\/\/raf.edu.rs\/en\/subjects\/multiprocessor-architecture\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Homepage","item":"https:\/\/raf.edu.rs\/en\/"},{"@type":"ListItem","position":2,"name":"Subjects","item":"https:\/\/raf.edu.rs\/en\/subjects\/"},{"@type":"ListItem","position":3,"name":"MULTIPROCESSOR ARCHITECTURE"}]},{"@type":"WebSite","@id":"https:\/\/raf.edu.rs\/en\/#website","url":"https:\/\/raf.edu.rs\/en\/","name":"School of Computing","description":"","publisher":{"@id":"https:\/\/raf.edu.rs\/en\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/raf.edu.rs\/en\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Organization","@id":"https:\/\/raf.edu.rs\/en\/#organization","name":"School of Computing","url":"https:\/\/raf.edu.rs\/en\/","logo":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/raf.edu.rs\/en\/#\/schema\/logo\/image\/","url":"https:\/\/raf.edu.rs\/en\/wp-content\/uploads\/2023\/02\/cropped-raf-engleski.png","contentUrl":"https:\/\/raf.edu.rs\/en\/wp-content\/uploads\/2023\/02\/cropped-raf-engleski.png","width":400,"height":66,"caption":"School of Computing"},"image":{"@id":"https:\/\/raf.edu.rs\/en\/#\/schema\/logo\/image\/"}},{"@type":"Person","@id":"https:\/\/raf.edu.rs\/en\/#\/schema\/person\/4e2166c781f2802c67414a1578c66a43","name":"RAF Admin","sameAs":["https:\/\/raf.app"],"url":"https:\/\/raf.edu.rs\/en\/author\/rafadmin\/"}]}},"_links":{"self":[{"href":"https:\/\/raf.edu.rs\/en\/wp-json\/wp\/v2\/posts\/13973","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/raf.edu.rs\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/raf.edu.rs\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/raf.edu.rs\/en\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/raf.edu.rs\/en\/wp-json\/wp\/v2\/comments?post=13973"}],"version-history":[{"count":0,"href":"https:\/\/raf.edu.rs\/en\/wp-json\/wp\/v2\/posts\/13973\/revisions"}],"wp:attachment":[{"href":"https:\/\/raf.edu.rs\/en\/wp-json\/wp\/v2\/media?parent=13973"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/raf.edu.rs\/en\/wp-json\/wp\/v2\/categories?post=13973"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/raf.edu.rs\/en\/wp-json\/wp\/v2\/tags?post=13973"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}